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NVIDIA

Senior QA Automation Engineer, ASIC Simulation

Posted One Month Ago
Be an Early Applicant
In-Office or Remote
Hiring Remotely in Greece
Senior level
In-Office or Remote
Hiring Remotely in Greece
Senior level
Develop and execute functional, performance, and security tests for virtual networking silicon and software. Build production-quality Python automation frameworks using OOP and Pytest, review feature designs, investigate defects, validate fixes, and collaborate with R&D to qualify releases. Apply deep networking expertise across L2, L3, EVPN, VXLAN, QoS, and related protocols while using SimX to debug ASIC behavior before physical hardware is available.
The summary above was generated by AI

What if your Python automation caught a critical ASIC bug before the physical silicon was even manufactured? At NVIDIA, our simulation platforms make that happen every release cycle! We are the System Ethernet QA Team at NVIDIA's R&D center, responsible for the testing and qualification of virtual networking silicon (SimX) and software—from L2 forwarding and L3 routing to overlays, QoS, and security. With SimX, developers and QA engineers get hardware-free, early access to the ASIC for better debugging. 

We are looking for a Senior QA Software Engineer who combines network protocol expertise with strong Python automation skills. Does debugging a BGP EVPN route leak excite you as much as refactoring a test framework? Then we should talk! 

What you'll be doing:

We don't just complete checklists; we collaborate closely with R&D to lead the quality of new features from design to deployment. In this role, we:

  • Review architectural designs and requirements for new features introduced to the product

  • Drive the design, development, and execution of tests across functional, performance, and security scopes as part of SW GA and update releases

  • Develop Python automation suites built on clean OOP principles

  • Chase down defects and validate fixes until we fully resolve the root cause

  • Leverage the SimX platform to validate code and debug the ASIC long before hardware arrives.

What We Need to See:

  • Combined network engineering depth with thorough software habits

  • 5+ years of hands-on QA or networking experience, backed by CCNP-equivalent protocol knowledge: L2 (VLAN, STP), L3 (BGP, OSPF), EVPN, VXLAN, and advanced features like PFC, ECN, RoCE, and QoS

  • Production-quality Python engineering—specifically, strong OOP design and hands-on experience with Pytest

  • Deep Linux proficiency (at an LPIC-1 or LPIC-2 level) to navigate system internals, analyze logs, and debug effectively

  • Clear verbal and written communication, with professional proficiency in written and spoken English

  • B.Sc. or or B.A. or equivalent experience in Computer Science, Electrical Engineering, or a similar background.

Ways to stand out from the crowd:

  • Experience with Docker and traffic generation tools (Ixia, TRex, Scapy)

  • Hands-on experience integrating tests into CI/CD pipelines (Jenkins, GitLab CI)

  • Working knowledge of virtualization platforms (KVM, VMware).

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

NVIDIA London, England Office

13th Floor One Angel Court, London, United Kingdom, EC2R 7HJ

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