About OLIX
AI is growing faster than any technology in history and the explosion in demand has created a massive infrastructure gap; we can no longer build chips or power stations fast enough to keep up. The industry is still leaning on a ten-year-old hardware blueprint that has reached its limit. A new paradigm that is faster and more efficient will be the biggest economic opportunity of the next century and create the most important company of the next decade. The OLIX Decode Accelerator 1 (DX-1) is the first accelerator architected specifically for decode. Rack-scale co-design of logic, data movement, packaging, optics and interconnect enables a step change in system level performance.
We are seeking an experienced and highly motivated Senior FPGA Engineer to design and implement the control and interface functions of our system. This role spans production system delivery and advanced hardware prototyping. You will work on high-bandwidth architectures involving high-speed interfaces, precision timing, transceivers, and signal processing pipelines. The position requires close collaboration across FPGA, ASIC, hardware, optical, and software teams.
Design and implement FPGA subsystems and hardware modules for high-performance systems.
Develop and optimise high-speed interface subsystems (PCIe Gen4, multi-lane transceivers operating at >25 Gb/s NRZ).
Implement and validate link integrity features including BER measurement and error correction (ECC, including SECDED).
Develop and integrate memory interfaces as required by system architecture.
Contribute to hardware prototyping activities in support of silicon development.
Collaborate with software engineers to enable low-level driver development and hardware control.
Work with hardware and optical engineers to ensure robust system integration and synchronisation.
Implement timing-critical and real-time control logic.
Conduct testing, validation, and performance optimisation under demanding operating conditions.
Debug complex hardware–software interactions and resolve system-level issues.
5+ years of FPGA design experience, including 3+ years working with high-speed interfaces and signal processing pipelines.
Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
Strong experience with PCIe and high-speed transceivers.
Solid understanding of precision timing and synchronisation in complex systems.
Experience with deterministic networking and time-distribution systems (such as White Rabbit).
Experience integrating external memory subsystems.
Verification experience using COCOTB, UVVM, or OSVVM.
Proficiency in Verilog and/or VHDL.
Python and scripting experience.
Experience with Xilinx/AMD UltraScale+ or Versal devices.
Strong debugging skills across hardware–software boundaries.
Competitive Salary: Commensurate with your experience, skills, and location
Equity & Ownership: Meaningful stock options. You’re not just joining the mission; you’re owning a piece of it
Proximity Bonus: We value your time. To minimise your commute and maximise your life, we offer an annual Living-Local Bonus if your residence is within 20 minutes of the office
Retirement Benefits: Employer-contributed retirement plans to help you build long-term financial security.
Due to U.S. export control regulations, candidates’ eligibility to work at OLIX depends on their most recent citizenship or permanent residency status. We are generally unable to consider applicants whose most recent citizenship or permanent residence is in certain restricted countries (currently including Iran, North Korea, Syria, Cuba, Russia, Belarus, China, Hong Kong, Macau, and Venezuela). Applicants who have subsequently obtained citizenship or permanent residency in another country not subject to these restrictions may still be eligible.
