Jobs at Fractile

Develop tools that improve how engineers use and optimize Fractile’s AI inference accelerator. The role involves identifying developer tooling opportunities, designing intuitive solutions, monitoring and optimizing large-scale LLM deployments, and integrating tools into existing engineering workflows. Responsibilities include working with inference frameworks, GPU programming technologies, and stakeholders across multiple teams within the software organization.

Drive end-to-end power, performance, and area closure for high-performance datapaths. Responsibilities include analyzing PPA bottlenecks, proposing RTL and microarchitectural changes, optimizing fixed-point, floating-point, or quantized arithmetic, closing timing through synthesis and STA iteration, applying low-power techniques, and collaborating with physical design engineers. The role also involves validating measurable silicon improvements and using formal verification or equivalence checking.

Lead technically informed sourcing and procurement for electronic components and EMS/CM partners. Own RFQs, cost modeling, supplier negotiations, qualification, NPI sourcing, BOM cost analysis, lifecycle management, risk mitigation, and dual-sourcing strategies. Collaborate with engineering, manufacturing, quality, finance, and program teams to optimize cost, availability, quality, and scalability across the product lifecycle.

Lead and grow a 10+ engineer compiler team to build the compiler stack for a novel AI accelerator. Drive compiler architecture, IR design, lowering strategies and performance optimisation, collaborating closely with hardware, driver, runtime and ML teams to enable industry-leading LLM inference performance.

Build developer-facing tooling, diagnostics, and workflows to run and optimise large language models on Fractile inference hardware. Create profiling/observability interfaces, quickstarts, docs, and examples. Advocate for external developer needs internally and collaborate with ML compiler, runtime, systems software, and silicon teams to shape APIs and abstractions.

Define and drive the architecture of compute engines, managing specifications, performance modelling, and collaborating with various teams to ensure optimal designs.

The Senior Logical Design Engineer will develop and implement high-performance RTL designs, collaborating with cross-functional teams, ensuring compliance with documentation and standards.

The Senior Verification Engineer will lead pre-silicon RTL verification processes, build testbenches, and improve hardware workflows in a collaborative team focused on ML/AI IC products.

As a Verification Engineer, you'll contribute to building ML/AI IC products, ensuring high standards of functional quality through collaboration on RTL verification.

Develop the ML compiler stack for AI acceleration hardware and optimize performance for large language models in a collaborative environment.

Develop pre-silicon models for AI hardware, support software development, and collaborate on architecture and performance evaluation.

Develop embedded firmware and systems software for management controllers, ensuring the reliability and safety of production-critical systems. Collaborate closely with hardware teams.

Responsible for implementing complex IC physical designs, collaborating with teams to optimize performance, power, and area while ensuring design integrity and manufacturability.

The role involves optimizing ML kernels, building low-level control paths, and collaborating with various teams to enhance performance.

Develop cutting-edge AI accelerator solutions by improving developer workflows, managing CI/CD pipelines, optimizing Bazel builds, and extending system support.

Build and maintain infrastructure and developer tooling for frontend and backend silicon teams. Integrate and support EDA tools and build systems, improve reproducible/cacheable workflows, deploy and manage cloud or on-prem compute via IaC, monitor resource usage, and optimize engineering workloads.