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Deepmind

Hardware Engineer, Physical Design

Posted 12 Days Ago
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In-Office
2 Locations
Mid level
Easy Apply
In-Office
2 Locations
Mid level
Lead automation and integration of physical design in automated chip design, requiring expertise in hardware, software components, and industry standards.
The summary above was generated by AI
Snapshot

Artificial Intelligence could be one of humanity’s most useful inventions. At Google DeepMind, we’re a team of scientists, engineers, machine learning experts and more, working together to advance the state of the art in artificial intelligence. We use our technologies for widespread public benefit and scientific discovery, and collaborate with others on critical challenges, ensuring safety and ethics are the highest priority.

About Us

We’re looking for hardware engineers specialized in physical design. You will be part of a team conducting research and engineering towards automatically designing hardware/chips using AI. You will have an opportunity for a strong impact. No machine learning experience required, but an open minded approach to drastically change current industry approaches to chip design, and an opportunity to be part of that transformative effort. Strong software skills are also required due to the nature of the effort and the existing team skills.

The Role

Our team at Google DeepMind explores the automation of chip design to bridge the massive velocity gap between AI algorithm evolution and chip design. Our work is a blend of hardware engineering, software engineering and AI research and engineering. Even if we primarily value your hardware and physical design expertise, an appetite for, and strong skills in, software engineering are important as you will be part of a diverse and talented group of AI, software and hardware engineers with a focus on designing a novel type of AI/software environment for generating chips using AI. In addition to your hands-on expertise in physical design over multiple tapeouts, we are looking for engineers with an open and research mindset for drastically changing current approaches to chip design.
Exemplifying a kind and responsible approach, you will empower the success of people around you, and elevate others to succeed.

Key responsibilities:
  • Lead and actively contribute to the automation and integration of physical design (floorplanning, power planning, synthesis, place and route, clock tree synthesis, and timing closure, STA, DRC, LVS, DFM, etc) in our automated flow.  
  • Leverage your hardware expertise to develop the software components required for physical design automation, and their software integration in our automated flow.
  • Find ways to automate the integration of silicon vendor feedback into an automated flow.
About You

In order to set you up for success as a Hardware Engineer at Google DeepMind,  we look for the following skills and experience:

In addition, the following would be an advantage: 

  • Interpersonal skills (discuss technical ideas effectively with colleagues, e.g. through whiteboard, design docs, presentations; interact directly with our end users on various channels), the effort being highly collaborative, within the project, and with other teams at Google
  • A few years of experience in ASIC physical design, including hands-on experience with production chips.
  • Demonstrated experience in successful tape-outs of complex chips.
  • Specifically, experience in interacting and collaborating with silicon foundries and other external vendors for the tapeout process.
  • Proficiency with Verilog and industry-standard EDA tools for physical design (e.g., Cadence Innovus, Synopsys Fusion Compiler, PrimeTime, Calibre).
  • Experience with scripting languages (e.g., Perl, Tcl) for automation of physical design flows.
  • Software experience in some common programming languages, e.g., Python, C++, Go, etc, and a demonstrated appetite to code.
  • An appetite to learn and innovate.

At Google DeepMind, we value diversity of experience, knowledge, backgrounds and perspectives and harness these qualities to create extraordinary impact. We are committed to equal employment opportunity regardless of sex, race, religion or belief, ethnic or national origin, disability, age, citizenship, marital, domestic or civil partnership status, sexual orientation, gender identity, pregnancy, or related condition (including breastfeeding) or any other basis as protected by applicable law. If you have a disability or additional need that requires accommodation, please do not hesitate to let us know.


  

Top Skills

C++
Cadence Innovus
Calibre
Go
Perl
Primetime
Python
Synopsys Fusion Compiler
Tcl
Verilog

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